Ahmed Hareedy
Director of REINS Group
Talks
Oral presentation titled "Read-and-run constrained coding for modern Flash devices,"
IEEE International Conference on Communications (ICC), Seoul, South Korea, May 2022.
Oral presentation titled "From devices to clouds: Coding for modern and next generation storage systems,"
The University of Colorado, Boulder (CU Boulder), Mar. 2020.
Oral presentation titled "Asymmetric LOCO codes: Constrained codes for Flash memories,"
Allerton Conference on Communications, Control, and Computing (Allerton), Monticello, IL, USA, Sep. 2019.
Oral tutorial titled "Graph-based error correcting codes for Flash memories,"
Flash Memory Summit (FMS), Santa Clara, CA, USA, Aug. 2019.
Oral presentation titled "Spatially-coupled code design for partial-response channels: Optimal object-minimization approach,"
IEEE Global Communications Conference (GLOBECOM), Abu Dhabi, UAE, Dec. 2018.
Oral presentation titled "A three-stage approach for designing spatially-coupled codes for Flash memories,"
Non-Volatile Memories Workshop (NVMW), San Diego, CA, USA, Mar. 2018.
Oral presentation titled "High performance non-binary spatially-coupled codes for Flash memories,"
IEEE Information Theory Workshop (ITW), Kaohsiung, Taiwan, Nov. 2017.
Oral presentation titled "LDPC codes for Flash memories,"
UCLA ECE Annual Research Review (UCLA ARR), Los Angeles, CA, USA, Apr. 2017.
Oral presentation titled "Non-binary LDPC code optimization for modern storage systems,"
Non-Volatile Memories Workshop (NVMW), San Diego, CA, USA, Mar. 2017.
Oral presentation titled "Graph-based error correcting codes for modern dense storage devices,"
Information Theory and Applications Workshop (ITA), San Diego, CA, USA, Feb. 2017. ITA Graduation Day Talk
Oral presentation titled "The weight consistency matrix framework for general non-binary LDPC code optimization: Applications in Flash memories,"
IEEE International Symposium on Information Theory (ISIT), Barcelona, Spain, Jul. 2016.
Oral presentation titled "Non-binary LDPC code optimization for partial-response channels,"
IEEE Global Communications Conference (GLOBECOM), San Diego, CA, USA, Dec. 2015.
Oral presentation titled "Quasi-cyclic non-binary LDPC codes for MLC NAND Flash memory,"
Flash Memory Summit (FMS), Santa Clara, CA, USA, Aug. 2015.
Oral presentation titled "Novel method for modeling IBIS4.2 four-level hysteresis behavior in an analog simulator,"
Electronics Packaging Technology Conference (EPTC), Singapore, Singapore, Dec. 2008.
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