METU EE413 Introduction to VLSI Design

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Report Outline



Instructor:
Asst. Prof. Dr. Tayfun AKIN

Catalogue description:
Design techniques for rapid implementations of very large-scale integrated (VLSI) circuits, MOS technology and logic. Structured design. Design rules, layout procedures. Design aids: layout, design rule checking, logic, and circuit simulation. Timing. Testability. Projects to develop and lay out circuits.

Course objectives:
Integrated Circuits have had tremendous growth over the past twenty years and promise to continue that growth for many years to come. By the year 2000, several billion transistors should be integrable on a single chip of silicon. The world-wide developments in technology makes it necessary to introduce these concepts to the students in undergraduate level, and many electronic companies in the world requires students with VLSI background. This does not exclude Turkey, and Turkish companies started to look for engineers with a knowledge on VLSI circuit design. This course aims to fill the gap in this expanding field and to introduce the students at METU to the integrated circuit technology and mask-level integrated circuit design.
The objective of this course is to introduce EE undergraduate students to design techniques and tools for rapid implementations of very large-scale integrated (VLSI) circuits. Since integrated circuit design is mastered only through experience, the students will be asked to design and lay out basic digital gates and then do the layout and verification of a specific integrated circuit as a term project.

Prerequisites:
EE 348, EE 312

Textbook(s) and reference books:
(a) Textbook:
Douglas A. Pucknell and Kamran Eshraghian, Basic VLSI Design e/3, Prentice Hall 1994
(b) Reference books:
Kang and Y. Leblebici, CMOS Digital Integrated Circuits: Analysis and Design
Neil H. E. Weste and Kamran Eshraghian, Principles of CMOS VLSI Design: A Systems Perspective e/2, Addison-Wesley, 1992

Homeworks:

Syllabus

(5 Hours) Introduction to CMOS Technology and Layout: integrated circuit technology, basic MOS transistors, CMOS fabrication

(4 Hours) Basic Electrical Properties of MOS Circuits: drain-to-source current versus voltage relationships, aspects of MOS threshold voltage, pass transistor, NMOS and CMOS inverter, MOS circuit model, Latch-up in CMOS

(6 Hours) MOS Circuit Design Processes: MOS layers, Stick diagrams, Scaleable CMOS Design Rules, Symbolic diagrams

(4 Hours) Basic Circuit Concepts: Sheet resistance, area capacitances of layers, inverter delays, driving large capacitive loads, propagation delays.

(1 Hour) Scaling of MOS Circuits: Scaling models and factors for device parameters

(5 Hours) Subsystem Design and Layout: architectural issues including partitioning and design simplification, switch logic, gate logic, combinational logic, clocked sequential logic, subsystem design processes

(4 Hours) Illustration of the Design Process- Computational Elements: examples of design process, regularity, design of an ALU subsystem, various adders, multiplexers

(4 Hours) Memory, registers, and Aspects of System Timing: commonly used storage/memory elements, forming arrays of memory cells, floor planning, register arrays, RAM arrays, system timing considerations

(3 Hours) Testability: system partitioning, design for testability, testing combinational logic and sequential logic, practical design for test guidelines, scan design techniques

(6 Hours) Introduction to Analog CMOS Circuits: current mirrors, CMOS Op-Amp stages, transistor sizing and ratioing, ac and dc analaysis