Dynamic Resource Allocation in Virtualized Networks for Network Slicing
Ceren Canpolat, M.S.
Thesis, Defense date: February 2020
The developments of 5G wireless technology, enables serving to various vertical industries through sharing a common infrastructure. To this end, multi-tenancy support of these diverse industries are realized on virtualized networks with the help of network slicing. The introduction of sharing brings many challenges such as QoS satisfaction, fairness and performance isolation among slices. The diversity of these slices mainly lies in their data rate requests and user populations. The slices with high data rate traffic requests are often given large number of resources. That resource allocation approach leaves the slice requests for low data rate slices out of the network. Overcoming all of these challenges with an efficient resource allocation approach is the main concern of this work. In this thesis, we propose DUCA (Dynamic User Count Aware) network slicing,a novel resource allocation scheme for virtualized radio access networks (RAN). DUCA’s resource allocation objective is to serve large number of user requests with high resource utilization results in the presence of diverse slice requirements. To this end, DUCA is formulated with an additional user count parameter so that not only requested amount of data rates but also user populations of slices can effect resource allocation. DUCA is compared with other resource allocation schemes under different network configurations. Simulation results show that the proposed DUCA outperforms compared resource allocation methods.
Generalized Resource Management for Heterogeneous Cloud Data Centers
Ahmet Erol, M.S.
Thesis, Defense date: September 2019
OpenStack is a widely used management tool for cloud computing which is designed to work on servers and allocate standard computing resources such as CPU, memory or disk. The current trend for integrating different hardware accelerators such as FPGAs and GPUs in the cloud requires managing these heterogeneous resources. In this thesis, we propose a generalization for OpenStack Nova project which extends the relevant data structures to include these new resources. More importantly, we present a new lightweight Nova Compute module that we call Nova-G Compute. Nova-G Compute is suitable to work with different hardware platforms and can communicate with the rest of the OpenStack Projects. We implement a hypervisor-like software to enable Nova-G Compute accessing the FPGA resources. We perform experimental evaluation of Nova-G Compute using the known and used OpenStack benchmarking tool Rally. Our results show that Nova-G Compute works as desired without any reduced performance compared to standard Nova.
Optimal Dynamic Resource Allocation for Heterogenous Cloud Data Centers
Nazım Umut Ekici, M.S.
Thesis, Defense date: September 2019 , Co-advised with Prof. Dr. Klaus Werner Schmidt
, Co-advised with Prof. Dr. Klaus Werner Schmidt
Today's data centers
are mostly cloud-based with virtualized servers to provide on-demand scalability
and flexibility of the available resources such as CPU, memory, data storage and
network bandwidth. Heterogeneous cloud data centers (CDCs) offer hardware
accelerators in addition to these standard cloud server resources. A cloud data
center provider may provide Infrastructure as a Service and Platform as a
Service (IPaaS), where the user gets a virtual machine (VM) with processing,
memory, storage and networking resources, which can be installed with any
desired operating system and software. Differently, Software as a Service
(SaaS), only enables user access to provided application for example via a web
browser without any control of the underlying infrastructure.
In this context, it is important to note that the data processing for SaaS can be executed on different physical resources such as a server as well as a hardware accelerator with different performance and power consumption. To this end, a very significant feature of heterogeneous CDCs is that they offer the flexibility of meeting user demands for SaaS by choosing among the available physical resource alternatives. To utilize this flexibility, a CDC resource manager must decide which resource alternative will be chosen, along with the decision of the physical resource the request will be assigned to.
In this thesis we propose ACCLOUD-MAN (ACCelerated CLOUD MANager), a novel resource manager for heterogeneous CDCs. ACCLOUD-MAN’s resource management objective is to reduce the power consumption of the CDC in order to support green computing. To this end, the resource allocation problem is modeled as an integer linear programming problem and is implemented in MATLAB, along with a cloud data center simulation platform. We evaluate the performance of ACCLOUD-MAN under different realistic cloud workloads. Simulation results show that the proposed ACCLOUD-MAN outperforms existing resource allocation methods such as OpenStack.
A Link Delay Computation Method for the Quality of Service Support in Software Defined Networks
Efe Balo, M.S.
Thesis, Defense date: September 2019
Packet switched networks cannot provide tight delay bounds that are required by certain types of applications despite facilitating high throughput. Therefore, delay measurementtechniquesforpacket-switchednetworkshavealwaysgrabbedtheattention of the community to both utilize advantages of packet-switched networks and provide a realistic end to end delay prediction of packets. Software De?ned Networking (SDN) isa new paradigmofpacket-switchednetworkingwhichgathersmanagement functionality of network in a logically single controller. SDN is thought to eliminate problems of legacy layered architecture by utilizing the control information coming from all network layers. However, in SDN topology, control plane and data plane are separated which implies control packets for network management ?ow in a different channel than datapath channel. Moreover, the SDN controller has to have a decision metric similar to legacy link-state computation approaches in order to calculate the most ef?cient route in the topology. All of these indicate that link delay computation in SDN needs new perspectives different than the legacy network to achieve its proper operation. In this thesis, we propose a link delay computation method for SDN topologies. For this purpose, we construct a framework which uses standard OpenFlow messages and computes the switch queuing delay in run-time. In this framework, we model each queue in SDN switches as a G/G/1 queue and measure the ingress traf?c with OpenFlow meters. Then, we utilize meter statistics to obtain mean and variance of interarrival times between packets. After ?nding the average state of the queues we eventually infer the respective queuing delay from Little’s equation. We demonstrate our method in three cases which are single ?ow per queue, multiple ?ows per queue and a test application which uses our delay information to determine the fastest queue of an SDN switch port. Also, we discuss the accuracy and the application limitations of the proposed method.
Efficient and Fair Adaptive Streaming: Algorithm, Implementation and Evaluation
Öge, M.S. Thesis, Defense date:
Streaming (HAS) is a popular video streaming method where the client downloads
video segments over standard HTTP protocol. In HAS, the server stores the video
segments that are encoded in different qualities which determine the video bit
rates. To this end, the client first downloads a file which describes the video
segments. Then, using a rate adaptation algorithm, the client decides on the
most appropriate video bit rate for the next segment to download and sends an
HTTP request for that segment. The rate adaptation algorithm utilizes
measurements of the network bandwidth by dividing the previously downloaded
segments' sizes by their download times. HAS exploits that HTTP is an ubiquitous
application layer protocol which can easily pass any network device, firewall
and Network Address Translation.
Video streaming performance is measured by the user's perception that is quantified by Quality of Experience (QoE). Accordingly, video freezes must be avoided as they decrease QoE significantly. The client aims for downloading at the highest quality utilizing the available bandwidth as much as possible. However, if the requested bit rate is increased too much, delays and packet loss events drive the client to decrease the bit rate subsequently. Such frequent rate switches decrease the QoE. Furthermore, it is desired that fairness among the clients is preserved where the clients that stream over a common bottleneck link share the bandwidth fairly.
In this thesis, we provide an Efficient and Fair Adaptive STreaming (EFAST) architecture to improve the performance of HAS according to the performance metrics that are defined above. In this architecture, clients rate adaptation is implemented by using a Fuzzy Logic Controller. The inputs of EFAST Fuzzy Logic Controller are the receiver buffer size and the estimated bandwidth. After fuzzy control steps, it selects a proper video bit rate of next segment. An analytical model of rate adaptation algorithm is defined to show that EFAST achieves the desired bit rate and buffer occupancy. We implement EFAST in both simulation environment and in real life network. We then perform experiments that evaluate the performance of EFAST in comprehensive network scenarios. Furthermore, we compare EFAST to other well-known HAS rate adaptation algorithms. Our results show that EFAST has more fairly bandwidth allocation among clients who share bottleneck, low switch rate changes, and high bottleneck efficiency with no buffer depletion.
Software Implementations of QoS Scheduling Algorithms for High Speed Networks
Aydın Pehlivanlı, M.S. Thesis, Defense date: January 2015
The end to end Quality of Service (QoS) support for the dominating multimedia
traffic in the contemporary computer networks is achieved by implementing
schedulers in the routers and deploying traffic shapers. To this end, realistic
modeling and simulation of these components is essential for network performance
The first contribution of this thesis is the design and implementation of a C++ simulator QueST (Quality of Service simulaTor) for this task. QueST is a modular cycle accurate simulator with a detailed modeling of the traffic flows, shapers and schedulers. The traffic generators and the schedulers of QueST are verified by comparison to the respective analytical models.
The QoS schedulers are data plane components in routers which have to operate at 10s of Gbps rates. Hence, the increasing scheduling complexity with the number of flows is an important problem. This problem can be alleviated by reducing the number of flows by traffic aggregation.
The second contribution of this thesis is the evaluation of previously developed Window Based Fair Aggregator (WBFA) in QueST under a large number of case studies to investigate its features and benefits as well as optimal parameter selection.
Implementation and Performance Analysis Of Switch Fabric Schedulers With a New Accurate Simulator Software
Ahmet Ada, M.S. Thesis, Defense date: September 2014
The switches and routers in computer networks forward the incoming packets that arrive at input ports to their output ports where the connections between input lines and output lines are made by a switch fabric. If the fabric speed can match the aggregate capacity of all input ports, the queuing of the packets is at the output ports. Such output queued arrangements yield the best throughput and delay for the packets together with different levels of Quality of Service Support (QoS) to different flows. However, the speed limits for these fabrics result in queuing at the input ports in practical switch/router implementations. Such devices require the scheduling of the switch fabric which is the decision of the matched input output port pairs. To this end, the design of these fabric schedulers for achieving high throughput, low delay as well as QoS support is an important research problem. The first contribution of this the- sis is a software simulator that is called SwitchSim that accurately simulates switch fabric schedulers. The design of the simulator is modular with well defined interfaces following an Object Oriented Approach to enable integrating different scheduler algorithms and traffic generation patterns. It is important to note that SwitchSim is verified by comparing its results to a hardware scheduler together with to the results of the legacy ISLIP scheduler. The second contribution of the thesis is extending ISLIP to support different priority flow to support QoS. Experiments are carried out using SwitchSim to evaluate the proposed fabric schedulers with QoS support and their results are presented with discussions. The results show that up to loads of 70% the proposed algorithms can provide less delay to the high priority flows without starving the low priority flows.
Switch Fabric Schedulers with Intelligent Multi-Class Support: Design, Implementation and Evaluation on FPGA
Murat Akpınar, M.S. Thesis, Defense date: September 2014
The applications in the contemporary computer networks require end-to-end Quality of Service (QoS). Moreover, di erent applications have di erent QoS requirements. Thus, it is important to support QoS in the network layer routers which can be achieved by scheduling the output queues in output queued routers. However, pure output queued routers are not easy to build. Hence, it is important to equip the fabric schedulers of input queued switches with QoS support. Thus, it is an important research problem to support QoS in input queued routers. In this thesis we investigate the VOQ fabric scheduler algorithms. Better QoS support for di erent applications is possible by implementing per flow queues at the input ports rather than coarse virtual output queues per output port. The first contribution of this thesis is an intelligent multi-class (IMC) VOQ architecture which is independent from fabric scheduler algorithms. Additionally, 2 di erent algorithms are proposed for intelligent side of the IMC VOQ architecture. The second contribution is a modular hardware design for fabric schedulers that support multi class. The design is carried out on FPGA by implementing the well-known ISLIP together with the proposed IMC unit. The correctness of the operation of the designed hardware is verified by comparing to a software simulator. The thesis further presents discussions of implementing other scheduler algorithms using the same hardware architecture and its scalability. The thesis presents the evaluation of FPGA resource usage of proposed IMC VOQ iSLIP.
Fast, Efficient and Dynamically Optimized Data and Hardware Architectures for String Matching
Salih Zengin, Ph.D. Thesis, Defense date: September 2014, Co-advised with Prof. Dr. Hasan Guran
Many fields of computing such as network intrusion detection employ string
matching modules (SMM) that search for a given set of strings in their input. An
SMM is expected to produce correct outcomes while scanning the input data at
high rates. Furthermore, the string sets that are searched for are usually large
and their sizes increase steadily.
In this thesis, motivated by the requirement of designing fast, accurate and efficient SMMs; we propose a number of SMM architectures that employ Bloom Filters to compactly represent the large amounts of data for the string sets. The proposed architectures address the well-known slowdown problem of the Bloom Filters because of the verifications of the positive matches.
To this end, the first contribution of the thesis is Double Bloom Filter SMM (DBF-SMM) which employs a second Bloom Filter which acts as a verification engine. We present an analysis, evaluation and implementation of the DBF-SMM. We further verify the required functionality of the DBF-SMM by modeling and testing the architecture in SystemC environment. Our analytical and implementation results demonstrate that DBF-SMM is superior with respect to the existing SMMs in terms of response time, string storage efficiency and hardware scalability of the DBF-SMM which demonstrates its superior performance compared to the previous Bloom Filter based SMM designs. Our analytical and implementation results demonstrate that DBF-SMM is superior with respect to the existing Bloom Filter based SMM designs in terms of response time, string storage efficiency and hardware scalability.
Simulation-based VoIP performance evaluation under different traffic and codec conditions
Berk Ünlü, M.S. Thesis, Defense date: September 2013
One of today’s most popular multimedia applications that needs more investigation and optimization is Voice over Internet Protocol (VoIP). Simulation tools are essential to test existing network technologies and develop new ones. They are effectively used for network analysis and solving design and optimization problems. The focus of this thesis is an extensive simulation study to evaluate the achieved Quality of Service (QoS) support by VoIP traffic under different network topologies, traffic profiles, codecs and queuing mechanisms. To this end, firstly we performed a comparative evaluation of network simulators. Accordingly, we selected ns-2 as our simulation tool because of its wide library of network components and traffic types and its open source facilities. Next, we defined a number of different scenarios guided by previous works in the literature. We conducted a set of simulation experiments with ns-2 and evaluated the VoIP performance parameters such as delay, jitter and packet loss ratio under these scenarios.
Design and implementation of hardware architectures for high-speed IP address lookup
Nizam Ayyıldız, Ph.D. Thesis, Defense date: August 2013, Co-advised with Prof. Dr. Hasan Guran
IP address lookup modules for backbone routers should store 100Ks of entries,
find the longest prefix match (LPM) for each incoming packet at 10s of Gbps line
speed and support thousands of lookup table updates each second. It is desired
that these updates are non-blocking, that is without disrupting the ongoing
lookups. Furthermore, considering the increasing line rates and table sizes, the
scalability of the design is very important. The goal of this thesis is
developing hardware IP lookup architectures that perform single clock cycle
lookups and non-blocking updates that are entirely carried out on hardware. To
this end, we propose
a custom TCAM architecture for IP lookup that we call S-DIRECT-Scalable and Dynamically REConfigurable TCAM and a complete IP lookup solution that utilizes different types of memory that we call SHIP-Scalable Highspeed IP lookup. Both S-DIRECT and SHIP feature a modular design that allows seamless scaling to different table sizes. We implement the developed architectures on FPGA with a resource effcient realization and provide the hardware requirements for implementation on other platforms. We demonstrate the viability of our architectures with a full implementation on FPGA that can store contemporary routing tables.
HTTP Adaptive Streaming architectures for Video on Demand and Live TV
HTTP Adaptive Streaming architectures for Video on Demand and Live TV Services
Yiğit Özcan, M.S. Thesis, Defense date:
Yiğit Özcan, M.S. Thesis, Defense date: August 2013
HTTP Adaptive Streaming (HAS) has become a popular video streaming solution since it both benefits from the ubiquitous HTTP protocol and firewall and NAT traversal capabilities of TCP. HAS aims to provide high Quality of Experience (QoE) to the clients under limited and varying bandwidth by rate adaptation algorithms which allow the clients to choose the most appropriate video quality. A rate adaptation algorithm should utilize the available bandwidth. Furthermore, the received video bitrates should not deviate from each other leading to an unfair bandwidth use among the clients. It is also desired to minimize the rate switches as they degrade QoE of the clients. In this thesis, we propose two architectures that operate on HAS. The first architecture is FEedback based Adaptive STreaming over HTTP (FEAST). FEAST enables the clients to adapt their rates according to the total number of clients, average video rate and the average bandwidth information provided by the server. These values are computed as moving averages by the server with a small amount of information sent from the clients. The server side computation is simple and not client specific which makes FEAST a scalable solution. The second architecture is Adaptive LIVE Streaming over HTTP (ALIVE) which enables a high number of clients to watch live TV channels over HTTP. ALIVE is based on enabling the clients to download the contents from nearby clients instead of the server whenever it is possible. ALIVE employs SVC which makes it possible to adapt the video bitrates of the clients even when they download from other clients. ALIVE decreases the load of the server and accommodates more clients as we demonstrate with simulations.
The development and hardware implementation of a high-speed adaptable packet switch fabric
Erdem Eyüp Akbaba, M.S. Thesis, Defense date:
January 2013 Abstract: Routers have to be fast enough to keep pace with increasing
traffic data rate because of the increasing need for network bandwidth and
processing. The switch fabric component of a router is a combination of hardware
and software which moves the incoming packets to the outgoing ports. The access
of the input ports to the switch fabric is controlled by a scheduler which
affects the overall performance together with the fabric design. In this thesis
we investigate two switch fabric and scheduler architectures, the well-known
iSlip fabric scheduler and the Byte-Focal switch. We observe that these two
architectures have different behaviors under different input traffic load
ranges. The novel contribution of this thesis is a combined switch architecture
which is composed of these two architectures that are implemented and run in
parallel to selectively forward the packets with lower delay to the outputs to
achieve an overall lower average delay. The design of the combined switch is
carried out on FPGA and simulated. Our results show that the combined
architecture has 100% throughput and a lower average delay compared to the
Byte-Focal switch and the input-queued switch with iSlip. On the other hand, our
combined switch uses more resources in FPGA than individual iSlip and Byte-Focal
Erdem Eyüp Akbaba, M.S. Thesis, Defense date: January 2013
Routers have to be fast enough to keep pace with increasing traffic data rate because of the increasing need for network bandwidth and processing. The switch fabric component of a router is a combination of hardware and software which moves the incoming packets to the outgoing ports. The access of the input ports to the switch fabric is controlled by a scheduler which affects the overall performance together with the fabric design. In this thesis we investigate two switch fabric and scheduler architectures, the well-known iSlip fabric scheduler and the Byte-Focal switch. We observe that these two architectures have different behaviors under different input traffic load ranges. The novel contribution of this thesis is a combined switch architecture which is composed of these two architectures that are implemented and run in parallel to selectively forward the packets with lower delay to the outputs to achieve an overall lower average delay. The design of the combined switch is carried out on FPGA and simulated. Our results show that the combined architecture has 100% throughput and a lower average delay compared to the Byte-Focal switch and the input-queued switch with iSlip. On the other hand, our combined switch uses more resources in FPGA than individual iSlip and Byte-Focal switch.
A new service architecture for IPTV over Internet
Merve Özkardeş, M.S. Thesis, Defense date:
January 2013 Abstract: Multimedia applications over the
Internet and Internet Protocol Television (IPTV) gain a lot of attention. IPTV
has a number of service requirements such as; high bandwidth, scalability,
minimum delay, jitter and channel switch time. IP multicast, IMS (IP Multimedia
System) Protocol and peer-to-peer approaches are proposed for implementing IPTV.
However, IP multicast requires all the routers in the core network to possess
multicast capability, IMS does not easily scale and P2P cannot efficiently
utilize the network resources because of its completely distributed nature. To
this end, we propose new application layer multicast protocol Cluster Based
Application Layer Multicast IPTV (CALMTV) which combines application layer
multicast, scalable video coding and probing techniques to meet IPTV
requirements. We present the components and their relevant algorithms and
evaluate the performance of CALMTV with ns2 simulations. Our results compared
with the published results of other IPTV architectures show that CALMTV has
better performance in end-to-end delay and zapping time.
Thesis overview Design and implementation of scheduling and switching architectures for
high speed networks Mustafa Sanlı, Ph.D. Thesis, Defense date: October
2011, Co-advised with
Prof. Dr. Hasan Güran
Merve Özkardeş, M.S. Thesis, Defense date: January 2013
Multimedia applications over the Internet and Internet Protocol Television (IPTV) gain a lot of attention. IPTV has a number of service requirements such as; high bandwidth, scalability, minimum delay, jitter and channel switch time. IP multicast, IMS (IP Multimedia System) Protocol and peer-to-peer approaches are proposed for implementing IPTV. However, IP multicast requires all the routers in the core network to possess multicast capability, IMS does not easily scale and P2P cannot efficiently utilize the network resources because of its completely distributed nature. To this end, we propose new application layer multicast protocol Cluster Based Application Layer Multicast IPTV (CALMTV) which combines application layer multicast, scalable video coding and probing techniques to meet IPTV requirements. We present the components and their relevant algorithms and evaluate the performance of CALMTV with ns2 simulations. Our results compared with the published results of other IPTV architectures show that CALMTV has better performance in end-to-end delay and zapping time.
Design and implementation of scheduling and switching architectures for
high speed networks
Mustafa Sanlı, Ph.D. Thesis, Defense date: October 2011, Co-advised with Prof. Dr. Hasan Güran
of Service (QoS) schedulers are one of the most important components for the
end-to-end QoS support in the Internet. The focus of this thesis is the hardware
design and implementation of the Packet Fair QoS schedulers, that is scalable
for high line speeds and large number of traffic flows. FPGA
is the selected hardware platform.
work on the hardware design and implementation of QoS schedulers are mostly
algorithm specific. In this thesis we propose a general architecture for the
design of the class of Packet Fair Queuing (PFQ) schedulers. Worst Case Fair
Weighted Fair Queuing Plus (WF2Q+)
is implemented and tested in hardware to demonstrate the proposed architecture
and design enhancements.
maximum line speed that PFQ algorithms can operate decreases as the number of
scheduled flows increases. We
propose to aggregate the flows to scale our PFQ architecture to high line
this end, the Window Based Fair Aggregator (WBFA) algorithm for flow
aggregation, provides a tunable trade-off between the efficient use of the
available bandwidth and the fairness among the constituent flows. [u1] WBFA
is also integrated to our hardware PFQ architecture.
We measure the QoS support provided by our PFQ architecture and WBFA by conducting hardware experiments on our custom built high speed network testbed which consists of three data processing cards and a backplane. The input traffic is provided by the traffic hardware traffic generator which is designed in the scope of this thesis.
A Faster Intrusion Detection Method for High-speed Computer Networks
Mehmet Cem Tarım, M.S. Thesis, Defense date: May 2011
The malicious intrusions to computer systems result in the loss of money, time and hidden information which require deployment of intrusion detection systems. Existing intrusion detection methods analyze packet payload to search for certain strings and to match them with a rule database which takes a long time in large size packets. Because of buffer limits, packets may be dropped or the system may stop working due to high CPU load. In this thesis, we investigate signature based intrusion detection with signatures that only depend on the packet header information without payload inspection. To this end, we analyze the well-known DARPA 1998 dataset to manually extract such signatures and construct a new rule set to detect the intrusions. We implement our rule set in a popular intrusion detection software tool, Snort. Furthermore we enhance our rule set with the existing rules of Snort which do not depend on payload inspection. We test our rule set on DARPA data set as well as a new data set that we collect using attack generator tools. Our results show around 30% decrease in detection time with a tolerable decrease in the detection rate. We believe that our method can be used as a complementary component to speed up intrusion detection systems.
A new feedback-based contention avoidance algorithm for optical burst switching networks
Hadi Alper Toku, M.S. Thesis, Defense date: December 2008
In this thesis, a feedback-based contention avoidance technique based on weighted Dijkstra algorithm is proposed to address the contention avoidance problem for Optical Burst Switching networks. Optical Burst Switching (OBS) has been proposed as a promising technique to support high-bandwidth, bursty data traffic in the next-generation optical Internet. Nevertheless, there are still some challenging issues that need to be solved to achieve an effective implementation of OBS. Contention problem occurs when two or more bursts are destined for the same wavelength. To solve this problem, various reactive contention resolution methods have been proposed in the literature. However, many of them are very vulnerable to network load and may suffer severe loss in case of heavy traffic. By proactively controlling the overall traffic, network is able to update itself in case of high congestion and by means of this method; contention avoidance can be achieved efficiently.
The performance analysis of the proposed algorithm is presented through network simulation results provided by OMNET++ simulation environment. The simulation results show that the proposed contention avoidance technique significantly reduces the burst loss probability as compared to networks without any contention avoidance techniques.
Connectionless traffic and variable packet size support in high speed network switches: improvements for the delay-limiter switch
Alican Akcasoy, M.S. Thesis, Defense date: June 2008
Quality of Service (QoS) support for real-time traffic is a critical issue in high-speed networks. The previously proposed Delay-Limiter Switch working with the Framed-Deadline Scheduler (FDS) is a combined input-output queuing (CIOQ) packet switch that can provide end-to-end bandwidth and delay guarantees for connection-oriented traffic. The Delay-Limiter Switch works with fixed-size packets. It has a scalable architecture and can provide QoS support for connection-oriented real-time traffic in a low-complexity fashion. The Delay-Limiter Switch serves connectionless traffic by using the remaining resources from the connection-oriented traffic. In this case, efficient management of the residual resources plays an important role on the performance of the connectionless traffic. This thesis work integrates new methods to the Delay-Limiter Switch that can improve the performance of the connectionless traffic while still serving the connection-oriented traffic with the promised QoS guarantees. A new method that makes it possible for the Delay-Limiter Switch to support variable-sized packets is also proposed.
A new approach for the scalable
intrusion detection in high-speed networks
Umit Burak Sahin, M.S. Thesis, Defense date:
The increasing network throughput challenges the current Intrusion Detection and Prevention Systems to have compatible high performance data processing. As the networks become faster and faster, the emerging requirement is to improve the performance of the Intrusion Detection and Prevention Systems to keep up with the increased network throughput. In high speed networks, it is very difficult for the traditional systems to process all the packets. Since the throughput of Intrusion Detection and Prevention Systems is not improved as fast as the switches’, routers’ throughputs, it is necessary to develop new detection techniques other than traditional techniques. Observing the flow patterns of intrusions in a computer system, we adopt an Intrusion Detection and Prevention System (ID/PS) technique to detect Layer 2-4 attacks. This thesis implements rule based intrusion prevention system using flow patterns gathered from the devices on the network. This work makes it possible to detect and prevent L2-L4 intrusions by using the flow data, logs and network management information without payload inspection, hence decreasing the load on the signature based IDPS and improving its performance in high-speed networks. Our approach is independent of the underlying network structure provided that certain flow level data can be collected. The performance of our approach is demonstrated in a real large scale network.
Scheduling algorithms for wireless CDMA networks
Serkan Ender Hakyemez, M.S. Thesis, Defense date:
In recent years the need for multimedia packet data services in wireless networks has grown rapidly. To overcome that need third generation (3G) mobile services have been proposed. The fast growing demands multimedia services in 3G services brought the need for higher capacity. As a result of this, the improvement on throughput, traffic serving performance has become necessary in 3G systems. Code division multiple access (CDMA) technique is one of the most important 3G wireless mobile techniques that has been defined. The scheduling mechanisms used in CDMA plays an important role on the efficiency of the system. The power, rate and capacity parameters are variable and dependent to each other in designing a scheduling mechanism. The schedulers for CDMA decide which user will use the frequency band at which time interval with what power and rate. In this thesis different type of algorithms used in time slotted CDMA are studied and a new algorithm which supports Quality of Service (QoS) is proposed. The performance analysis of this proposed algorithm is done via simulation in comparison to selected CDMA schedulers.
Routing algorithms for on chip networks
Maksat Atagoziyev, M.S. Thesis, Defense date:
Network-on-Chip (NoC) is communication infrastructure for future multi-core Systems-on-Chip (SoCs). NoCs are expected to overcome scalability and performance limitations of Point-to-Point (P2P) and bus-based communication systems. The routing algorithm of a given NoC affects the performance of the system measured with respect to metrics such as latency, throughput and load distribution. In this thesis, the popular Orthogonal One Turn (O1TURN) and Dimension Order Routing algorithms (DOR) for 2D-meshes are implemented by computer simulation. Investigating the effect of parameters such as packet, buffer and topology sizes on the performance of the network, it is observed that the center of the network is loaded more than the edges. A new routing algorithm is proposed and evaluated to achieve a more balanced load distribution. The results show that this goal is achieved with a trade off in latency and throughput in DOR and O1TURN.
A novel method for the detection of P2P traffic in the network backbone inspired by intrusion detection systems
, M.S. Thesis, Defense date:
The share of peer-to-peer (P2P) protocol in the total network traffic
day-by-day in the Turkish Academic Network (UlakNet) similar to the
networks in the world. This growth is mostly because of the popularity
shared content and the great enhancement in the P2P protocol since it
out with Napster. The shared files are generally both large and
Motivated by the problems of UlakNet with the P2P traffic, we propose a
method for P2P traffic detection in the network backbone in this thesis.
Observing the similarity between detecting traffic that belongs to a
protocol and detecting an intrusion in a computer system, we adopt an
Detection System (IDS) technique to detect P2P traffic. Our method is a
detection procedure that uses traffic flows gathered from border
it is scalable and does not have the problems of other approaches that
packet payload data or transport layer ports.